Embodiments of the present invention relate to a semiconductor device and a method for fabricating the same, and more particularly to a technology for preventing migration of metal, for example, copper (Cu) ion when forming a Through Silicon Via (TSV) with copper.
Among packaging technologies of semiconductor integrated circuits (ICs), a three-dimensional stack technology has been rapidly developed to increase packaging density as well as to reduce the size of electronic components, resulting in production of a high-performance semiconductor device. The 3D stacked package is formed by stacking a plurality of chips that have the same memory capacity, and is generally called a stack chip package.
The stack chip package is advantageous because it can result in reduced production costs of the package and because it can be produced on a mass production basis. In contrast, the stack chip package is disadvantageous in that since the number and size of stacked chips are often increased, a line space for electric connection of the package becomes reduced to an insufficient size.
That is, the conventional stack chip package includes a plurality of chips each mounted on substrates which are attached to each other. This configuration enables a bonding pad of each chip to be electrically connected to a conductive circuit pattern of a substrate through wiring. However, a space for wire bonding and a circuit pattern area for a substrate connected to the wire are needed, resulting in an increase in size of the semiconductor package.
In order to solve the above-mentioned problems, a Through Silicon Via (TSV) structure has been proposed to implement a stack chip package. In more detail, after forming a TSV in each chip in a wafer, physical and electrical connection between chips is vertically achieved by the TSV.
However, if the TSV is exposed by repeated heat treatment during a fabrication process, a metal material (e.g., Cu ion) contained in the TSV may be stressed and gather in an active region of the semiconductor device. The gathered metal material may serve as a generation and recombination center of minority carriers in such a manner that a leakage current occurs. Thus, electrical characteristics of the semiconductor package are deteriorated.
When forming a TSV configured to pass through a semiconductor substrate and an interlayer insulation film, Cu ions may migrate through oxide films before being absorbed in an active region of the semiconductor substrate of the cell region, thus causing a crack in a bit line contact deposited over the active region.